Intel has made a bold statement about the future of high-end chip manufacturing, particularly regarding the role of ASML’s advanced lithography machines. 
While these machines, especially extreme ultraviolet (EUV) and high-NA EUV scanners, have been the backbone of semiconductor manufacturing, Intel’s director suggests that their importance might diminish as transistor designs evolve.
ASML’s EUV machines have been critical in enabling chipmakers like TSMC to print circuits at incredibly small scales, a necessity for advanced technologies like 7nm chips. However, the Intel director argues that the next wave of transistor designs, such as gate-all-around FET (GAAFET) and complementary FET (CFET), will reduce the reliance on lithography. These new designs are expected to shift the focus from printing small features to a greater emphasis on etching, a post-lithography step that plays a critical role in shaping the wafer.
GAAFET and CFET transistors use a novel approach that wraps the gate around the transistor, which means etching away material laterally rather than focusing on shrinking the wafer features. This change in approach could make lithography machines, like ASML’s high-NA EUV, less crucial for future chip production. The Intel director suggests that this will allow for increased transistor density not only on a given plane but also vertically, reducing the need for advanced lithography.
While high-NA EUV machines might still find their place in future manufacturing, the overall reliance on them could be much less than before. This shift is due to the increasing importance of etching and 3D stacking technologies in chip fabrication. The Intel director also hinted that ASML may face challenges as chipmakers move toward more complex, multi-dimensional transistor designs like CFET, which stack transistors vertically to save space.
In conclusion, while EUV and high-NA EUV machines have been instrumental in the progress of semiconductor manufacturing, the evolution of transistor designs could lessen their relevance in the years to come. As chipmakers adapt to these new technologies, the role of etching and 3D stacking could take center stage.