SMIC 5nm & Dimensity 9400: Next-Gen SoC Breakthroughs

SMIC Advances 5nm Technology Amid Challenges, While TSMC’s 3nm Dimensity 9400 SoC Prepares for Launch

China’s leading semiconductor manufacturer, SMIC, has reportedly achieved a breakthrough by developing 5nm technology using its existing DUV equipment. However, numerous hurdles remain before the foundry can make significant progress with this advanced manufacturing process. Despite this, improved power efficiency has been noted. There’s currently no update on whether this new technology will be used when Huawei announces its next Kirin chipset.

SMIC’s current 7nm node is used for the Huawei Kirin 9000S and Kirin 9010. The manufacturer employs its N+2 variant to achieve a higher transistor density. Yet, both chipsets lag behind competitors, including Google’s Tensor G3, which offers better performance and energy efficiency. Digital Chat Station, a Weibo tipster, mentioned that the 5nm process shows improved power consumption, but it’s uncertain if it will be employed in the next Kirin chipset. U.S. trade sanctions prevent SMIC from acquiring cutting-edge EUV machinery, crucial for mass-producing next-generation wafers. Consequently, SMIC relies on older DUV equipment, making their 5nm wafers potentially up to 50% more expensive than TSMC’s, due to low yields and increased time consumption. This may make Huawei hesitant to adopt this technology unless SMIC improves its yields through extensive testing.

In contrast, it’s rumored that the next Kirin SoC will continue to be manufactured on SMIC’s 7nm node, with the N+3 iteration promising higher transistor density than the Kirin 9010 in Huawei’s Pura 70 series. For now, SMIC will continue its tests on the 5nm process and any significant updates will be communicated in the future.

Meanwhile, TSMC’s second-generation 3nm process is reportedly set to mass-produce MediaTek’s Dimensity 9400, introducing several improvements at an increased cost. Tipster Digital Chat Station didn’t specify the price hike but hinted that upcoming flagships like the Vivo X200 will be pricier. Nonetheless, these devices will benefit from power efficiency and AI performance upgrades, including a 40% faster Neural Processing Unit (NPU) compared to the Dimensity 9300.

The exact performance of the Dimensity 9400 remains unclear, though it is expected to show substantial gains in single-core and multi-core scores due to the adoption of ARM’s ‘BlackHawk’ CPU architecture. Additionally, the Dimensity 9400 is rumored to have a significant die size increase, measuring 150mm² and featuring 30 billion transistors, potentially making it the largest smartphone silicon in physical size.

MediaTek CEO Rick Tsai is confident in the Dimensity 9400, projecting a 50% annual revenue increase following its launch, which is anticipated in October. The competitive pricing of the Dimensity 9400 aims to undercut Qualcomm’s Snapdragon 8 Gen 4, encouraging long-term partnerships with MediaTek among smartphone manufacturers.

While these developments are promising, it is advisable to await further analysis for an impartial view of the Dimensity 9400. Stay tuned for more updates in the coming months as these advancements continue to unfold.

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